Renesas Electronics /R7FA4W1AD /SYSTEM /SNZEDCR

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Interpret as SNZEDCR

AD0MATED=0, AGT1UNFED=0, SCI0UMTED=0, AD0UMTED=0, DTCNZRED=0, DTCZRED=0

Description

Snooze End Control Register

Fields

AGT1UNFED	AGT1 Underflow Snooze End Enable 0 (0): Disable the Snooze End request 1 (1): Enable the Snooze End request
DTCZRED	Last DTC Transmission Completion Snooze End Enable 0 (0): Disable the Snooze End request 1 (1): Enable the Snooze End request
DTCNZRED	Not Last DTC Transmission Completion Snooze End Enable 0 (0): Disable the Snooze End request 1 (1): Enable the Snooze End request
AD0MATED	ADC140 Compare Match Snooze End Enable 0 (0): Disable the Snooze End request 1 (1): Enable the Snooze End request
AD0UMTED	ADC140 Compare Mismatch Snooze End Enable 0 (0): Disable the Snooze End request 1 (1): Enable the Snooze End request
Reserved	These bits are read as 00. The write value should be 00.
SCI0UMTED	SCI0 Address Mismatch Snooze End Enable 0 (0): Disable the Snooze End request 1 (1): Enable the Snooze End request

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